MAX5955BEEE+【PDF 8/15 页】IC DUAL HOT-SWAP CTRLR 16-QSOP

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Sheet目录43

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Startup Period

TIM

sets the duration of the startup period from 0.45s

to 50ms (see the Setting the Startup Period, RTIM sec-

tion). The default startup period is fixed at 9ms when

TIM is floating. The startup period begins after the fol-

lowing three conditions are met:

1) V

IN1

or V

IN2

exceeds the UVLO threshold (2.4V) for

the UVLO to startup delay (37.5ms).

2) V

ON1

and V

ON2

exceed the ON threshold (0.875V).

3) The device is not latched or in its autoretry delay (see

the Latched and Autoretry Overcurrent Fault

Management section).

The MAX5955/MAX5956 limit the load current if an

overcurrent fault occurs during startup instead of com-

pletely turning off the external MOSFETs. The slow

comparator is disabled during the startup period and

the load current can be limited in two ways:

1) Slowly enhancing the MOSFETs by limiting the

MOSFET gate-charging current.

2) Limiting the voltage across the external current-

sense resistor.

During the startup period the gate-drive current is limit-

ed to 100礎 and decreases with the increase of the

gate voltage (see the Typical Operating Characteris-

tics). This allows the controller to slowly enhance the

MOSFETs. If the fast comparator detects an overcur-

rent, the MAX5955/MAX5956 regulate the gate voltage

to ensure that the voltage across the sense resistor

does not exceed V

SU,TH

. This effectively regulates the

inrush current during startup. Figure 2 shows the start-

up waveforms. PGOOD_ goes high impedance 0.75ms

after the startup period if no fault condition is present.

VariableSpeed/BiLevel Fault Protection

VariableSpeed/BiLevel fault protection incorporates two

comparators with different thresholds and response

times to monitor the load current (Figure 3). During the

startup period, protection is provided by limiting the

load current. Protection is provided in normal operation

(after the startup period has expired) by discharging

both MOSFET gates with a strong 3mA pulldown cur-

rent in response to a fault condition. After a fault,

PGOOD_ is pulled low, the MAX5955B and MAX5956B

stay latched off and the MAX5955A and MAX5956A

automatically restart.

Slow-Comparator Startup Period

The slow comparator is disabled during the startup

period while the external MOSFETs are turning on.

Disabling the slow comparator allows the device to

ignore the higher-than-normal inrush current charging

the board capacitors when a card is first plugged into a

live backplane.

Low-Voltage, Dual Hot-Swap Controllers with

Independent On/Off Control

8 _______________________________________________________________________________________

4.3V TO 5.8V

GATE

PGOOD

OUT

LOAD

START

+ t

PGDLY

BOARD

= LARGE

BOARD

= 0

SU,TH

SENSE

Figure 2. Startup Waveform

SENSE VOLTAGE (V

- V

SENSE

)

SC,TH

FC,TH

(4 x V

SC,TH

)

3ms

110祍

260ns

SLOW

COMPARATOR

FAST

COMPARATOR

Figure 3. VariableSpeed/BiLevel Response

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